PROGRAM (tentative)

                        6th Workshop on 
       Post-Binary Ultra-Large-Scale Integration Systems
                  St. Francis Xavier University
                 Antigonish, Nova Scotia, Canada 
                         May 27, 1997.

[Four tutorials] (Two parallel sessions with two rooms)
    Time        :  9:00--12:10
    Reward for  :  250 US$ each (... Too small ???)
    instructors
    Registration:  free
    fee

  (Tutorial 1a) --Room 1
    Time        : 9:00--10:30
    Title       : Multiple-Valued Logic Design
    Instructor  : Prof. Jon T. Butler
                 (Naval Postgraduate School, USA)
  (Tutorial 1b) --Room 1
    Time        : 10:40--12:10
    Title       : Multiple-Valued VLSI Circuits and Systems
    Instructor  : Prof. Charles B. Silio, Jr.
                 (University of Maryland, USA)
  (Tutorial 2a) --Room 2
    Time        : 9:00--10:30
    Title       : Fundamentals of Multiple-Valued Logic Algebras
    Instructor  : Prof. Ivo G. Rosenberg
                 (University of Montreal, Canada)
  (Tutorial 2b) --Room 2
    Time        : 10:40--12:10
    Title       : Fuzzy Logic and Its Mathematical Properties
    Instructor  : Prof. Masao Mukaidono
                 (Meiji University, Japan)

[Discussion sessions]
    Time        : 14:00--17:20 (Room 1 only)

 (Session 1)
    Time        : 14:00--15:00
    Title       : Multiple-Valued Logic Design
    Chair       : Prof. D. M. Miller
                 (University of Victoria, Canada)
 (Session 2)
    Time        : 15:10--16:10
    Title       : Fuzzy Logic
    Chair       : 
 (Session 3)
    Time        : 16:20--17:20
    Title       : Challenging of Multiple-Valued VLSI Circuits
                  and Devices
    Chair       : Dr. Lutz J. Micheel
                 (Wright Laboratory U.S. Air Force, USA)
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