3rd INTERNATIONAL WORKSHOP ON POST-BINARY ULSI SYSTEMS
Friday, May 27, 1994
The 57 Park Plaza Hotel
Boston, Massachusetts
Sponsor: The Japanese Research Group on Multiple-Valued Logic
Chair: Tsutomu Sasao, Kyushu Inst. of Technology, Japan
12:00-12:10 Introduction: T. Sasao
12:10-13:10 PART I: Systems and Implementation
Organizer: Lutz Micheel, Air Force Wright Laboratory,
Rule-Programmable Multiple-Valued Matching VLSI
Processor for Real-Time Rule-Based Systems,
T. Hanyu; Tohoku Univ.
Advanced System Architecture and Nanoelectronics,
G. Frazier; Texas Instruments
Ultra Fast, Ultra Dense Circuits Based on Sidewall
RHETs, RTDs, and 3-D Integrated Loads,
U. Mishra; Univ. of California, Santa Barbara
13:10-13:30 Break
13:30-14:10 PART II: Digital Field Programmable Arrays and Systems
Organizer: Marek Perkowski, Portland State Univ.,
Field Programmable Gate Arrays, The Technology,
Physical Design and Logic Synthesis,
M. Chrzanowska-Jeske; Portland State Univ.
Design Automation for FPGAs, An Overview,
M. Perkowski; Portland State Univ.
14:10-14:20 Break
14:20-15:20 PART III: Analog Field Programmable Arrays and Systems
Organizers: Glenn Gulak, University of Toronto
and Marek Perkowski, Portland State Univ.
Field Programmable Analog Devices,
E. Pierzchala and M. Perkowski, Portland State Univ.
On the decomposition of continuous functions
Timothy D. Ross, Jeffery A. Goldman and David A. Gadd
TBA
Glenn Gulak and his collaborators,
15:20-15:40 Break
15:40-16:40 PART IV: Intelligent Systems
Organizer: Takahiro Hanyu, Tohoku Univ.
The Role of Continuous-Valued Logic in a Mobile Robot,
Jonathan Mills; Indiana Univ.
Super Intelligent Vehicles
Ichiro Masaki; MIT
Application to Multiple-Valued Intelligent Integrated Systems"
Michitaka Kameyama; Tohoku Univ.
16:50 Closeing Remarks: T. Sasao