Tentative Program (RM2009)  Last updated on May 21, 2009
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May 23 (Sat)
12:00-13:00 Registration of RM2009 (At the Okinawa Industry Support Center: ISMVL2009 site)

17:30-18:00 BUS ride to RM2009 site. 
    ( *************** Do not miss this bus **************** )
18:00-19:30 Dinner at a Restaurant 
      Hotel Palm Royal NAHA: 1F IL FIORE (Italian Food)
   
19:40-21:00 Session S (Opening+Special: Chair, T. Sasao)
----------     Special Talk   --------------------------------------
  A. Yamada,"History of research on switching theory in Japan: On the contributions of Akira Nakashima"
(This talk is sponsored by IEEE Circuits and Systems Society,
Fukuoka Chapter. Any person can attend without paying registration fee.)
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20:10-21:00 Session S (Transform: Chair, J. T. Butler)
  C. Moraga and R. Stankovic,"On a property of spectral transforms"
  Self indroduction and discussion.

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May 24 (Sun)

9:05-10:20 Session 1 (Decision Diagrams: Chair, T. Sasao)
  S. Minato,"Recent results on BDD based large-scale data processing for knowledge discovery"
  B. Alizadeh and M. Fujita,"Modularity in word-level decision diagrams"
  R. Stankovic, S. Stankovic and J. Astola,"Remarks on the representation of prototype functions in LP classifications by Walsh decision diagrams"

10:20-10:50 Break

10:50-11:40 Session 2 (Reversible logic 1: Chair,G. W. Dueck )
  J. Rice, K. Fazel, K. Kent, and M. Thornton,"Toffoli gate cascade generation using ESOP minimization and QMDD based swapping"
  T. Hirayama, H. Higashiohno, and Y. Nishitani,"Search space reduction for reversible logic synthesis by evaluating lower bounds"

12:00-13:20 Lunch at a Restaurant 
      Hotel Royal Orion: 3F Katabami(Japanese Food)

13:30-14:45 Session 3 (Reversible logic 2: Chair, C. Moraga)
  R. Wille and R. Dreschler,"Synthesizing reversible logic: An overview"
  M. Miller, G. Dueck and R. Wille,"Synthesizing reversible circuits from irreversible specifications using Reed-Muller spectral techniques"
  S. Yamashita and I. Markov,"Adaptive equivalence-checking for quantum circuits"

14:45-15:05 Break

15:05-16:20 Session 4 (EXOR: Chair, D. M. Miller)
  B. Steinbach and C. Posthoff,"The Boolean differential calculas- Introduction and examples"
  J. T. Butler, G. Dueck, S. Yanushkevich and V. Shmerko,"On the use of transeunt triangles to synthesize fixed-polarity Reed-Muller expansions of functions"
  J. T. Butler and T. Sasao,"Logic functions for cryptography- A Tutorial"
16:20-16:30   Closing
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